U.S. Semiconductor Controls: Section 232, CHIPS Guardrails, and Allied Equipment Exposure
U.S. semiconductor policy now links tariff exposure, CHIPS funding conditions, BIS licensing, and allied equipment controls. Taiwan has a tariff formula; Korea, Japan, and the Netherlands still face less-defined exposure.
The immediate tariff action is narrow. The compliance work is not. Importers and suppliers now need to track tariff classification, Chapter 99 exceptions, CHIPS-recipient restrictions, BIS licensing conditions, and allied equipment-control exposure in the same review file.
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Section 232 tariff: narrow first scope, wider risk
The Section 232 measure starts with a 25% duty on a defined band of advanced AI-compute semiconductors. The covered HTS subheadings are 8471.50, 8471.80, and 8473.30, with technical thresholds based on total processing performance and DRAM bandwidth. The White House fact sheet identifies NVIDIA H200 and AMD MI325X as affected products.
The first scope is limited, but the exception structure is broad. Chapter 99 provisions cover data centers, repair and replacement, R&D, startups, consumer electronics, industrial use, and public-sector use. That structure matters because it gives Commerce a ready map for later expansion. The two dates to watch are the April 14, 2026 report on Phase 1 negotiations and the July 1, 2026 report on the U.S. data-center semiconductor market.
CHIPS Act guardrails: subsidy with operating limits
CHIPS Act funding is not just financial support. For recipients, it limits future production strategy in countries of concern. The NIST guardrails FAQ describes restrictions on semiconductor manufacturing-capacity expansion in foreign countries of concern, including China, Russia, North Korea, and Iran. It also covers limits tied to sensitive technology transfer and covered transactions.
That means the tariff and subsidy files should not be reviewed separately. A supplier may receive U.S. investment support and still face tight limits on China-side capacity. Buyers that rely on CHIPS-funded suppliers should keep a record of the supplier's award status, U.S. milestone commitments, and guardrail exposure.
BIS licensing: conditional access, not rollback
BIS moved H200-class exports to China and Macao from a presumption of denial to case-by-case review. That does not make the route open. A license applicant must show adequate U.S. domestic supply, no diversion of foundry capacity away from U.S. customers, Know Your Customer checks, U.S.-based third-party performance testing, and no military or weapons end use. IaaS deployments can also trigger reporting when the remote user or parent company is in China, Russia, or Iran.
The case-by-case standard applies to export from the United States. Reexports and in-country transfers abroad remain under the original denial posture. In practical terms, an H200 or MI325X made outside the United States may need to enter the United States first, absorb the Section 232 analysis, pass testing, and then move under a U.S. export license.
Taiwan exposure: a published capacity formula
Taiwan has the clearest path because the U.S. has published a capacity-linked preference. The USTR U.S.-Taiwan reciprocal trade fact sheet says the U.S. will provide preferential treatment in the Section 232 semiconductor and semiconductor-manufacturing-equipment investigation, taking account of Taiwan's economic and national-security alignment with the United States. The Commerce fact sheet on the U.S.-Taiwan semiconductor and trade investment package gives the operating detail: Taiwan firms building new U.S. semiconductor capacity may import up to 2.5 times planned capacity without Section 232 duties during the approved construction period, with a lower preferential rate above that quota.
The commercial logic is simple: tariff treatment improves when the firm can point to measurable U.S. capacity. That matters for TSMC because TSMC's March 2025 release raised its expected U.S. investment to $165 billion across fabs, advanced packaging, and R&D. Taiwan therefore has both a public formula and a named investment base.
Korea exposure: HBM is the pressure point
Korean firms are exposed through two channels. Samsung has U.S. advanced-logic fabrication plans. SK hynix has HBM advanced-packaging exposure in Indiana. A U.S.-Korea statement uses a no-less-favorable framing for future semiconductor and semiconductor-equipment treatment, but it does not publish a Taiwan-style formula.
The open issue is Phase 2. If Section 232 expands to memory, HBM, or semiconductor manufacturing equipment, Korean suppliers could face tariff exposure before a quantified carve-out is available. Compliance teams covering Korean inputs should watch for a U.S.-Korea follow-on instrument that links investment milestones to tariff treatment.
Japan exposure: equipment alignment, not tariff relief
Japan's exposure sits less in chip imports and more in semiconductor manufacturing equipment. The MATCH Act targets allied alignment on advanced SME controls. The Senate Foreign Relations Committee release on the MATCH Act frames the bill as a way to prevent adversaries from buying chokepoint SME technology from the United States or partner countries. The House Select Committee release on HFAC passage describes the House package as export-control legislation covering semiconductor manufacturing equipment and chip smuggling.
The Japan question is therefore whether Japanese SME suppliers are pulled into a U.S.-grade control posture within the statutory window. For buyers, this is not mainly a duty-rate question. It is a supply-continuity and licenseability question for tools, replacement parts, servicing, and China-linked end users.
Netherlands exposure: the ASML jurisdiction problem
The Netherlands is exposed through the same SME-control channel. The issue is not a broad Dutch semiconductor tariff. It is whether Dutch equipment jurisdiction aligns with U.S. restrictions quickly enough to avoid U.S. fallback measures. The House markup record for H.R. 8170, the MATCH Act, confirms the bill's focus on export restrictions for certain semiconductor manufacturing equipment and components.
For compliance teams, the Dutch exposure should be tracked as a vendor and service restriction risk. If the U.S. forces tighter alignment, a China-linked fab or affiliate may lose access not only to new tools but also to servicing and components. That can affect delivery schedules even when the immediate transaction is not an H200-class chip shipment.
Allied exposure: one formula, three open files
The country comparison is now part of the operating review. Taiwan has a published tariff-preference formula tied to U.S. capacity. Korea has HBM and memory exposure but no public formula. Japan and the Netherlands have equipment-control exposure under the MATCH Act track rather than direct tariff relief. Those differences should not be collapsed into a generic ally carve-out.
A practical review should keep four tabs open: Taiwan for capacity-linked tariff treatment, Korea for HBM and memory scope, Japan for SME alignment, and the Netherlands for tool jurisdiction and servicing. The legal authorities differ, but the commercial question is the same: can the supplier prove that its U.S.-market access supports U.S. capacity or U.S.-aligned controls?
What to monitor next
The next useful records are concrete. Watch the April 14 Phase 1 negotiation report, the July 1 data-center semiconductor market report, any Federal Register notice that adds memory, HBM, or SME to the tariff scope, and any BIS licensing record that clarifies how H200-class applications are treated.
For an operating review, start with HTS 8471.50, 8471.80, and 8473.30. Add Chapter 99 provisions 9903.79.03 through 9903.79.09 for end-use exceptions. Then separate the country files. Taiwan has a published capacity-linked formula. Korea has investment exposure but not yet a published formula. Japan and the Netherlands have SME-control exposure under the MATCH Act track. That is the current compliance gap.